6 UART 错误状态寄存器
UERSTAT0 0x01D00014 R UART0 错误状态寄存器初始值0x6
UERSTAT1 0x01D04014 R UART1 错误状态寄存器初始值0x6
位名称BIT 描述
Break Detect [3] 该位为1指示一个暂停信号已经接收到
0 = No break receive
1 = Break receive
Frame Error [2] 该位为1指示一个frame 错误发生
0 = No frame error during receive
1 = Frame error
Parity Error [1] 该位为1指示在接收时一个奇偶错误发生
0 = No parity error during receive
1 = Parity error
Overrun Error [0] 该位为1指示一个溢出错误发生
0 = No overrun error during receive
1 = Overrun error
注：当UART错误状态寄存器时，UERSATn[3:0]自动清除。
7 UART FIFO状态寄存器
UFSTAT0 0x01D00018 R UART0 FIFO状态寄存器初始值0x6
UFSTAT1 0x01D04018 R UART1 FIFO状态寄存器初始值0x6
位名称BIT 描述
Reserved [15:10]
Tx FIFO Full [9] 当发送FIFO满时该位为1
0 = 0-byte ≤ Tx FIFO data ≤ 15-byte
1 = Full
Rx FIFO Full [8] 当发送FIFO满时该位为1
0 = 0-byte ≤ Rx FIFO data ≤ 15-byte
1 = Full
Tx FIFO Count [7:4] Tx FIFO里的数据数量
Rx FIFO Count [3:0] Rx FIFO里的数据数量
8 UART MODEM状态寄存器
UMSTAT0 0x01D0001C R UART0 MODEM状态寄存器初始值0x6
UMSTAT1 0x01D0401C R UART1 MODEM状态寄存器初始值0x6
位名称BIT 描述
Delta CTS [4] 该位指示输入到S3C44B0X的nCTS信号自从上次读后已经改变状态
0 = Has not changed
1 = Has changed
Reserved [3:1] Reserved
Clear to Send [0] 0 = CTS signal is not activated(nCTS pin is high)
1 = CTS signal is activated(nCTS pin is low)
9 UART 发送缓冲寄存器和FIFO寄存器
UTXH0 0x01D00020(Little endian) W(byte) UART0发送缓冲寄存器初始值-
0x01D00023(Big endian)
UTXH1 0x01D04020(Little endian) W(byte) UART1发送缓冲寄存器初始值-
0x01D04023(Big endian)
10 UART 接收缓冲寄存器和FIFO寄存器
URXH0 0x01D00024(Little endian) R(byte) UART0接收缓冲寄存器初始值-
0x01D00027(Big endian)
URXH1 0x01D04024(Little endian) R(byte) UART1接收缓冲寄存器初始值-
0x01D04027(Big endian)
注:当溢出错误出现时, URXHn,否则,即使USTATn的溢出位已经清除,下一个接收的数据也将使溢出错误出现.
11 UART 波特率分频寄存器
UBRDIV0 0x01D00028 R/W UART0波特率分频寄存器初始值-
UBRDIV1 0x01D04028 R/W UART1波特率分频寄存器初始值-
11 INTERRUPT CONTROLLER
S3C44B0X的中断控制器有30个中断源。
S3C44B0X 支持新的中断处理模式称为（vectored interrupt mode），在多个中段请求发生时，由硬件优先级逻辑确定应该有哪个中断得到服务，同时硬件逻辑使中断相量表的跳转指令加载到（0X18或0X1C）位置，在该位置执行跳转指令使程序跳到相应的中断服务线程，因此相对与传统的ARM的软件方法能够大大减少中断进入延时。
分支指令机器代码= 0xea000000 +((<destination address> - <vector address> - 0x8)>>2)
destination address为中断服务线程ISR 的开始地址
vector address 为中断源在中断相量表中的地址，即分支指令所在地址。
分支指令机器代码有硬件自动产生。
中断源在中断相量表中的位置如下
中断源向量地址
EINT0 0x00000020
EINT1 0x00000024
EINT2 0x00000028
EINT3 0x0000002c
EINT4/5/6/7 0x00000030
INT_TICK 0x00000034
INT_ZDMA0 0x00000040
INT_ZDMA1 0x00000044
INT_BDMA0 0x00000048
INT_BDMA1 0x0000004c
INT_WDT 0x00000050
INT_UERR0/1 0x00000054
INT_TIMER0 0x00000060
INT_TIMER1 0x00000064
INT_TIMER2 0x00000068
INT_TIMER3 0x0000006c
INT_TIMER4 0x00000070
INT_TIMER5 0x00000074
INT_URXD0 0x00000080
INT_URXD1 0x00000084
INT_IIC 0x00000088
INT_SIO 0x0000008c
INT_UTXD0 0x00000090
INT_UTXD1 0x00000094
INT_RTC 0x000000a0
INT_ADC 0x000000c0
有两种类型的中断模式，FIQ （快速中断）和IRQ.所有的中断源在中断请求时应该确定使用的中断模式。
中断源描述Master Group Slave ID
EINT0 外部中断0 mGA sGA
EINT1 外部中断1 mGA sGB
EINT2 外部中断2 mGA sGC
EINT3 外部中断3 mGA sGD
EINT4/5/6/7 外部中断4/5/6/7 mGA sGKA
TICK RTC 定时器滴答中断mGA sGKB
INT_ZDMA0 DMA0 中断mGB sGA
INT_ZDMA1 DMA1 中断mGB sGB
INT_BDMA0 桥DMA0 中断mGB sGC
INT_BDMA1 桥DMA1 中断mGB sGD
INT_WDT 看门狗定时器中断mGB sGKA
INT_UERR0/1 UART0/1错误中断mGB sGKB
INT_TIMER0 定时器0中断mGC sGA
INT_TIMER1 定时器1中断mGC sGB
INT_TIMER2 定时器2中断mGC sGC
INT_TIMER3 定时器3中断mGC sGD
INT_TIMER4 定时器4中断mGC sGKA
INT_TIMER5 定时器5中断mGC sGKB
INT_URXD0 UART0接收中断mGD sGA
INT_URXD1 UART1接收中断mGD sGB
INT_IIC IIC 中断mGD sGC
INT_SIO SIO 中断mGD sGD
INT_UTXD0 UART0发送中断mGD sGKA
INT_UTXD1 UART1发送中断mGD sGKB
INT_RTC RTC 警告中断mGKA –
INT_ADC ADC 结束中断mGKB –
中断优先级产生模块
对于IRQ中断请求有一个中断优先级产生模块，如果中断向量模式使用和一个中断源被配置为ISQ中断，中断将被中断优先级产生模块处理。中断优先级产生模块处理包括五个单元：1个master单元，4个slave单元，每个slave单元管理6个中断源，包括4个可编程的优先级源(sGn)和2个固定优先级源(sGKn，其优先级在6个优先级源中最低，其中sGKA的优先级高于sGKB的优先级).。一个master单元管理4个slave单元mGn和2个中断源mGKn，用来确定4个slave单元,和2个中断源的优先级mGKn，其中4个slave单元的优先级次序可编程，其中的2个中断源 INT_RTC 和INT_ADC中断源在26个中断源中优先级最低，并且INT_RTC的优先级高于INT_ADC的优先级。
中断寄存器
1 中断控制寄存器
INTCON 0x01E00000 R/W 中断控制寄存器0x7
位名称BIT 名称
Reserved [3]
V [2] 该位允许IRQ使用向量模式
0 = Vectored interrupt mode
1 = Non-vectored interrupt mode
I [1] 该位允许IRQ中断
0 = IRQ interrupt enable
1 = Reserved
注:在使用IRQ中断之前该位必须清除
F [0] 该位允许FIQ中断
0 = FIQ interrupt enable (FIQ中断不支持向量中断模式)
1 = Reserved
注: 在使用FIQ中断之前该位必须清除
1 中断挂起寄存器
INTPND 0x01E00004 R/W 指示中断请求状态0x0000000
位名称BIT 名称
EINT0
1 中断挂起寄存器
INTPND 0x01E00004 R/W 指示中断请求状态0x0000000
位名称BIT 名称
EINT0 [25] 0 = Not requested, 1 = Requested
EINT1 [24] 0 = Not requested, 1 = Requested
EINT2 [23] 0 = Not requested, 1 = Requested
EINT3 [22] 0 = Not requested, 1 = Requested
EINT4/5/6/7 [21] 0 = Not requested, 1 = Requested
INT_TICK [20] 0 = Not requested, 1 = Requested
INT_ZDMA0 [19] 0 = Not requested, 1 = Requested
INT_ZDMA1 [18] 0 = Not requested, 1 = Requested
INT_BDMA0 [17] 0 = Not requested, 1 = Requested
INT_BDMA1 [16] 0 = Not requested, 1 = Requested
INT_WDT [15] 0 = Not requested, 1 = Requested
INT_UERR0/1 [14] 0 = Not requested, 1 = Requested
INT_TIMER0 [13] 0 = Not requested, 1 = Requested
INT_TIMER1 [12] 0 = Not requested, 1 = Requested
INT_TIMER2 [11] 0 = Not requested, 1 = Requested
INT_TIMER3 [10] 0 = Not requested, 1 = Requested
INT_TIMER4 [9] 0 = Not requested, 1 = Requested
INT_TIMER5 [8] 0 = Not requested, 1 = Requested
INT_URXD0 [7] 0 = Not requested, 1 = Requested
INT_URXD1 [6] 0 = Not requested, 1 = Requested
INT_IIC [5] 0 = Not requested, 1 = Requested
INT_SIO [4] 0 = Not requested, 1 = Requested
INT_UTXD0 [3] 0 = Not requested, 1 = Requested
INT_UTXD1 [2] 0 = Not requested, 1 = Requested
INT_RTC [1] 0 = Not requested, 1 = Requested
INT_ADC [0] 0 = Not requested, 1 = Requested
3 中断模式寄存器
INTMOD 0x01E00008 R/W 中断模式寄存器0x0000000
位名称BIT 名称
EINT0 [25] 0 = IRQ mode 1 = FIQ mode
EINT1 [24] 0 = IRQ mode 1 = FIQ mode
EINT2 [23] 0 = IRQ mode 1 = FIQ mode
EINT3 [22] 0 = IRQ mode 1 = FIQ mode
EINT4/5/6/7 [21] 0 = IRQ mode 1 = FIQ mode
INT_TICK [20] 0 = IRQ mode 1 = FIQ mode
INT_ZDMA0 [19] 0 = IRQ mode 1 = FIQ mode
INT_ZDMA1 [18] 0 = IRQ mode 1 = FIQ mode
INT_BDMA0 [17] 0 = IRQ mode 1 = FIQ mode
INT_BDMA1 [16] 0 = IRQ mode 1 = FIQ mode
INT_WDT [15] 0 = IRQ mode 1 = FIQ mode
INT_UERR0/1 [14] 0 = IRQ mode 1 = FIQ mode
INT_TIMER0 [13] 0 = IRQ mode 1 = FIQ mode
INT_TIMER1 [12] 0 = IRQ mode 1 = FIQ mode
INT_TIMER2 [11] 0 = IRQ mode 1 = FIQ mode
INT_TIMER3 [10] 0 = IRQ mode 1 = FIQ mode
INT_TIMER4 [9] 0 = IRQ mode 1 = FIQ mode
INT_TIMER5 [8] 0 = IRQ mode 1 = FIQ mode
INT_URXD0 [7] 0 = IRQ mode 1 = FIQ mode
INT_URXD1 [6] 0 = IRQ mode 1 = FIQ mode
INT_IIC [5] 0 = IRQ mode 1 = FIQ mode
INT_SIO [4] 0 = IRQ mode 1 = FIQ mode
INT_UTXD0 [3] 0 = IRQ mode 1 = FIQ mode
INT_UTXD1 [2] 0 = IRQ mode 1 = FIQ mode
INT_RTC [1] 0 = IRQ mode 1 = FIQ mode
INT_ADC [0] 0 = IRQ mode 1 = FIQ mode
3 中断屏蔽寄存器
INTMSK 0x01E0000C R/W 确定哪个中断源被屏蔽，屏蔽的中断源将不被服务0x07ffffff
位名称BIT 描述
Reserved [27]
Global [26] 0 = Service available 1 = Masked
EINT0 [25] 0 = Service available 1 = Masked
EINT1 [24] 0 = Service available 1 = Masked
EINT2 [23] 0 = Service available 1 = Masked
EINT3 [22] 0 = Service available 1 = Masked
EINT4/5/6/7 [21] 0 = Service available 1 = Masked
INT_TICK [20] 0 = Service available 1 = Masked
INT_ZDMA0 [19] 0 = Service available 1 = Masked
INT_ZDMA1 [18] 0 = Service available 1 = Masked
INT_BDMA0 [17] 0 = Service available 1 = Masked
INT_BDMA1 [16] 0 = Service available 1 = Masked
INT_WDT [15] 0 = Service available 1 = Masked
INT_UERR0/1 [14] 0 = Service available 1 = Masked
INT_TIMER0 [13] 0 = Service available 1 = Masked 1
INT_TIMER1 [12] 0 = Service available 1 = Masked
INT_TIMER2 [11] 0 = Service available 1 = Masked
INT_TIMER3 [10] 0 = Service available 1 = Masked
INT_TIMER4 [9] 0 = Service available 1 = Masked
INT_TIMER5 [8] 0 = Service available 1 = Masked
INT_URXD0 [7] 0 = Service available 1 = Masked
INT_URXD1 [6] 0 = Service available 1 = Masked
INT_IIC [5] 0 = Service available 1 = Masked
INT_SIO [4] 0 = Service available 1 = Masked
INT_UTXD0 [3] 0 = Service available 1 = Masked
INT_UTXD1 [2] 0 = Service available 1 = Masked
INT_RTC [1] 0 = Service available 1 = Masked
INT_ADC [0] 0 = Service available 1 = Masked
3 IRQ中断向量模式寄存器
寄存器地址读/写描述初始值
I_PSLV 0x01E00010 R/W 确定slave组的IRQ优先级0x1b1b1b1b
I_PMST 0x01E00014 R/W master寄存器的IRQ优先级0x00001f1b
I_CSLV 0x01E00018 R 当前slave寄存器的IRQ优先级0x1b1b1b1b
I_CMST 0x01E0001C R 当前master寄存器的IRQ优先级0x0000xx1b
I_ISPR 0x01E00020 R IRQ中断服务挂起寄存器
(同时仅能一个服务位被设置) 0x00000000
I_ISPC 0x01E00024 W IRQ中断服务清除寄存器Undef.
F_ISPC 0x01E0003C W FIQ 中断服务清除寄存器Undef.
(对I_ISPC/ F_ISPC写入1,INTPND 将被自动清除)
在ISR中断服务线程的结束，INTPND必须清除。
为了清除I_ISPC/F_ISPC,应该遵守如下两个规则：
1 I_ISPC/F_ISPC寄存器仅能在ISR中断服务线程中存取。
2 通过写I_ISPC/F_ISPC寄存器来清除I_ISPR/INTPND寄存器
如果不遵守这两个规则，在中断请求发生时，I_ISPR/INTPND寄存器可以为0。
I_PSLV的位描述
位名称BIT 描述
PSLAVE@mGA [31:24] 确定mGA中的sGA, B, C, D的优先级
每个sGn必须有不同的优先级
PSLAVE@mGB [23:16] 确定mGB中的sGA, B, C, D的优先级
每个sGn必须有不同的优先级
PSLAVE@mGC [15:8] 确定mGC中的sGA, B, C, D的优先级
每个sGn必须有不同的优先级
PSLAVE@mGD [7:0] 确定mGD中的sGA, B, C, D的优先级
每个sGn必须有不同的优先级
PSLAVE@mGA BIT 描述初始值
sGA (EINT0) [31:30] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 00
sGB (EINT1) [29:28] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 01
sGC (EINT2) [27:26] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 10
sGD (EINT3) [25:24] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 11
PSLAVE@mGB
sGA (INT_ZDMA0) [23:22] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 00
sGB (INT_ZDMA1) [21:20] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 01
sGC (INT_BDMA0) [19:18] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 10
sGD (INT_BDMA1) [17:16] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 11
PSLAVE@mGC
sGA (TIMER0) [15:14] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 00
sGB (TIMER1) [13:12] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 01
sGC (TIMER2) [11:10] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 10
sGD (TIMER3) [9:8] 00: 1 st 01: 2 nd 10: 3 rd 11: 4 th 11
PSLAVE@mGD
sGA (INT_URXD0) [7:6] 00: 1 st 01: 2 nd 10: 3 rd
